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- FPC(3C) Last changed: 10-20-98
-
-
- NNAAMMEE
- ffppcc, ggeett__ffppcc__ccssrr, sseett__ffppcc__ccssrr, ggeett__ffppcc__iirrrr, sswwaappRRMM, sswwaappIINNXX -
- Floating-point control registers
-
- SSYYNNOOPPSSIISS
- ##iinncclluuddee <<ssyyss//ffppuu..hh>>
-
- iinntt ggeett__ffppcc__ccssrr((vvooiidd));;
-
- iinntt sseett__ffppcc__ccssrr((iinntt ccssrr));;
-
- iinntt ggeett__ffppcc__iirrrr((vvooiidd));;
-
- iinntt sswwaappRRMM((iinntt xx));;
-
- iinntt sswwaappIINNXX((iinntt xx));;
-
- IIMMPPLLEEMMEENNTTAATTIIOONN
- IRIX systems
-
- DDEESSCCRRIIPPTTIIOONN
- These routines are to get and set the floating-point control registers
- of MIPS floating-point units. All of these routines take and or
- return their values as 32-bit integers.
-
- The <<ssyyss//ffppuu..hh>> file contains unions for each of the control
- registers. Each union contains a structure that breaks out the bit
- fields into the logical parts for each control register. This file
- also contains constants for fields of the control registers.
-
- All implementations of MIPS floating-point have a control and status
- register and a implementation revision register. The control and
- status register is returned by ggeett__ffppcc__ccssrr. The sseett__ffppcc__ccssrr routine
- sets the control and status register and returns the old value. The
- implementation revision register is read-only and is returned by the
- ggeett__ffppcc__iirrrr routine.
-
- The sswwaappRRMM routine sets only the rounding mode and returns the old
- rounding mode. The routine sswwaappIINNXX sets only the sticky inexact bit
- and returns the old one. The bits in the arguments and return values
- to sswwaappRRMM and sswwaappIINNXX are right justified.
-
- NNOOTTEESS
- sswwaappRRMM and sswwaappIINNXX are in lliibbmm..aa .. The link editor searches this
- library under the -lm option.
-
- AALLSSOO SSEEEE
- RR44000000 MMiiccrroopprroocceessssoorr UUsseerr''ss MMaannuuaall
-
- SSEEEE AALLSSOO
- This man page is available only online.
-
-